AMD’s Next-Gen Strix Point APUs Spotted with RDNA 3.5 iGPUs in ROCm Github Repository

In a recent development, AMD‘s highly anticipated next-generation AMD Strix Point Accelerated Processing Units (APUs) have been sighted in the ROCm Github repository, revealing intriguing details about their graphics processing units (GPUs). The repository showcases entries for the RDNA 3.5 “GFX1150” and “GFX1151” IDs, which have been previously glimpsed in various Linux patches and the AMDGPU LLVM backend. However, the latest revelation introduces the Strix Point and Strix Point Halo variants, providing a glimpse into the GPU IDs they are set to utilize upon launch.

The commit titled “Strix Halo Support and Strix support in staging” within the ROCm Github repository signals an enhancement in support for these upcoming APUs. Notably, the Strix Point Halo APUs will employ the GFX1151 IP, while the Strix Point 1 APUs will utilize the GFX-1150 IP. The key differentiator between the existing GFX110X and the upcoming GFX115X IPs lies in the refreshed and slightly optimized RDNA 3.5 GPU architecture, promising higher clocks, increased core counts on premium parts, and efficiency improvements.

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Scheduled to debut later this year under the Ryzen 8050 APU branding, the initial AMD Strix Point APUs are poised to incorporate a next-gen XDNA 2 Neural Processing Unit (NPU) known as “Ryzen AI.” This NPU is expected to deliver a significant performance boost, boasting up to 3 times the uplift, translating to approximately 48 TOPs solely from the NPU and over 60 TOPs when combined with the GPU and CPU capabilities.

The standard SKUs of the AMD Strix Point APUs are anticipated to feature up to 12 Zen 5 CPU cores and 16 RDNA 3.5 GPU cores. On the other hand, the Strix Point Halo APUs are projected to offer even more impressive specifications! including up to 16 Zen 5 CPU cores and up to 40 RDNA 3.5 GPU cores.

AMD Ryzen 8050 Strix Point Mono Expected Features:

• Zen 5 (4nm) Monolithic Design
• Up To 12 Cores In Hybrid Config (Zen 5 + Zen 5C)
• 32 MB of Shared L3 Cache
• 16 RDNA 3+ Compute Units
• 128-bit LPDDR5X Memory Controller
• XDNA 2 Engine Integrated
• ~25 TOPS AI Engine
• 2H 2024 Launch (Expected)

AMD Ryzen 8050 Strix Point Halo Expected Features:

• Zen 5 Chiplet Design
• Up To 16 Cores
• 64 MB of Shared L3 Cache
• 40 RDNA 3+ Compute Units
• 256-bit LPDDR5X Memory Controller
• XDNA 2 Engine Integrated
• ~50 TOPS AI Engine
• 2H 2024 Launch (Expected)

The release of the AMD Strix Point APUs is anticipated in the second half of 2024! with the initial APU shipments to Original Equipment Manufacturers (OEMs) set to commence the following year. This timeline aligns with Intel’s plans to introduce its Arrow Lake and Lunar Lake CPUs! serving as successors to the highly anticipated Meteor Lake. Tech enthusiasts are eagerly awaiting the debut of these cutting-edge processors! which promise to redefine the landscape of computing power and performance.

Sources: ROCm GitHub, Wccftech, Kepler_L2